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 MC74HC1G04 Single Inverter
The MC74HC1G04 is a high speed CMOS inverter fabricated with silicon gate CMOS technology. The internal circuit is composed of multiple stages, including a buffer output which provides high noise immunity and stable output. The MC74HC1G04 output drive current is 1/2 compared to MC74HC series.
* * * * * * *
High Speed: tPD = 7 ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25_C High Noise Immunity Balanced Propagation Delays (tpLH = tpHL) Symmetrical Output Impedance (IOH = IOL = 2 mA) Chip Complexity: FET = 105 Pb-Free Packages are Available
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http://onsemi.com MARKING DIAGRAMS
1 SC70-5/SC-88A/SOT-353 DF SUFFIX CASE 419A
H5d
Pin 1
NC
1
5
VCC
5
H5M
1 SOT23-5/TSOP-5/SC59-5 DT SUFFIX CASE 483
IN A
2
Pin 1
GND
3
4
OUT Y d = Date Code M = Month Code
Figure 1. Pinout (Top View) PIN ASSIGNMENT
1 IN A 1 2 OUT Y 3 4 5 NC IN A GND OUT Y VCC
Figure 2. Logic Symbol
FUNCTION TABLE
Input A L H Output Y H L
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2005
1
January, 2005 - Rev. 8
Publication Order Number: MC74HC1G04/D
MC74HC1G04
MAXIMUM RATINGS
Symbol VCC VIN VOUT IIK IOK IOUT ICC TSTG TL TJ qJA PD MSL FR VESD DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink Current DC Supply Current per Supply Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature Under Bias Thermal Resistance Power Dissipation in Still Air at 85_C Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 28 to 34 Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 125_C (Note 5) SC70-5/SC-88A (Note 1) TSOP-5 SC70-5/SC-88A TSOP-5 Parameter Value *0.5 to )7.0 *0.5 to VCC )0.5 *0.5 to VCC )0.5 $20 $20 $12.5 $25 *65 to )150 260 )150 350 230 150 200 Level 1 UL 94 V-0 @ 0.125 in u2000 u200 N/A $500 V Unit V V V mA mA mA mA _C _C _C _C/W mW
ILATCHUP
Latchup Performance
mA
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 2 ounce copper trace with no air flow. 2. Tested to EIA/JESD22-A114-A. 3. Tested to EIA/JESD22-A115-A. 4. Tested to JESD22-C101-A. 5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN VOUT TA tr , tf DC Supply Voltage DC Input Voltage DC Output Voltage Operating Temperature Range Input Rise and Fall Time VCC = 2.0 V VCC = 3.0 V VCC = 4.5 V VCC = 6.0 V NORMALIZED FAILURE RATE Parameter Min 2.0 0.0 0.0 *55 0 0 0 0 Max 6.0 VCC VCC )125 1000 600 500 400 Unit V V V _C ns
DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES
Junction Temperature C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0
FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130_C TJ = 120_C TJ = 100_C TJ = 110_C TJ = 90_C TJ = 80_C 100 TIME, YEARS
1 1 10 1000
Figure 3. Failure Rate vs. Time Junction Temperature
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MC74HC1G04
DC ELECTRICAL CHARACTERISTICS
VCC Symbol VIH Parameter Minimum High-Level Input Voltage Test Conditions (V) 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 VIN = VIH or VIL IOH = -20 mA 2.0 3.0 4.5 6.0 4.5 6.0 2.0 3.0 4.5 6.0 4.5 6.0 6.0 6.0 1.9 2.9 4.4 5.9 4.18 5.68 2.0 3.0 4.5 6.0 4.31 5.80 0.0 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.1 0.26 0.26 $0.1 1.0 Min 1.5 2.1 3.15 4.20 0.5 0.9 1.35 1.80 1.9 2.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.1 0.33 0.33 $1.0 10 TA = 25_C Typ Max TA v 85_C Min 1.5 2.1 3.15 4.20 0.5 0.9 1.35 1.80 1.9 2.9 4.4 5.9 4.08 5.58 0.1 0.1 0.1 0.1 0.40 0.40 $1.0 40 mA mA V Max *55_C v TA v 125_C Min 1.5 2.1 3.15 4.20 0.5 0.9 1.35 1.80 Max Unit V
VIL
Maximum Low-Level Input Voltage
V
VOH
Minimum High-Level Output Voltage VIN = VIH or VIL
V
VIN = VIH or VIL IOH = -2 mA IOH = -2.6 mA VOL Maximum Low-Level Output Voltage VIN = VIH or VIL VIN = VIH or VIL IOL = 20 mA
VIN = VIH or VIL IOL = 2 mA IOL = 2.6 mA IIN ICC Maximum Input Leakage Current Maximum Quiescent Supply Current VIN = 6.0 V or GND VIN = VCC or GND
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 6.0 ns)
TA = 25_C Symbol tPLH, tPHL Parameter Maximum Propagation Delay Delay, Input A or B to Y Test Conditions VCC = 5.0 V CL = 15 pF CL = 50 pF Min Typ 3.5 18 10 7 6 3 Max 15 TA v 85_C Min Max 20 *55_C v TA v 125_C Min Max 25 Unit ns
II I I I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I I I I I I I IIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIII I I IIIIII I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIII IIIIII I I I I IIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIII I I
VCC = 2.0 V VCC = 3.0 V VCC = 4.5 V VCC = 6.0 V VCC = 5.0 V 100 27 20 17 10 125 35 25 21 15 155 90 35 26 20 tTLH, tTHL Output Transition Time CL = 15 pF CL = 50 pF ns VCC = 2.0 V VCC = 3.0 V VCC = 4.5 V VCC = 6.0 V 25 16 11 9 5 125 35 25 21 10 155 45 31 26 10 200 60 38 32 10 CIN Maximum Input Capacitance pF Typical @ 25_C, VCC = 5.0 V 10 CPD Power Dissipation Capacitance (Note 6) pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
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MC74HC1G04
tr 90% 50% 10% tPHL OUTPUT Y 90% 50% 10% tTHL tTLH tPLH tf VCC CL* GND INPUT OUTPUT
INPUT A
*Includes all probe and jig capacitance. A 1-MHz square input wave is recommended for propagation delay tests.
Figure 4. Switching Waveforms
Figure 5. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature Logic Circuit Indicator MC MC Temp Range Identifier 74 74 Tape and Reel Suffix T1 T1
Device Order Number MC74HC1G04DFT1 MC74HC1G04DFT1G
Technology HC1G HC1G
Device Function 08 08
Package Suffix DF DF
Package Type SC70-5/SC-88A/ SOT-353 SC70-5/SC-88A/ SOT-353 (Pb-Free) SC70-5/SC-88A/ SOT-353 SC70-5/SC-88A/ SOT-353 (Pb-Free) SOT23-5/TSOP-5/ SC59-5 SOT23-5/TSOP-5/ SC59-5 (Pb-Free)
Tape and Reel Size 178 mm (7 in) 3000 Unit 178 mm (7 in) 3000 Unit 178 mm (7 in) 3000 Unit 178 mm (7 in) 3000 Unit 178 mm (7 in) 3000 Unit 178 mm (7 in) 3000 Unit
MC74HC1G04DFT2 MC74HC1G04DFT2G
MC MC
74 74
HC1G HC1G
08 08
DF DF
T2 T2
MC74HC1G04DTT1 MC74HC1G04DTT1G
MC MC
74 74
HC1G HC1G
08 08
DT DT
T1 T1
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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MC74HC1G04
PACKAGE DIMENSIONS
SC70-5/SC-88A/SOT-353 DF SUFFIX 5-LEAD PACKAGE CASE 419A-02 ISSUE G
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A-01 OBSOLETE. NEW STANDARD 419A-02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 4 INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --- 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --- 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20
A G
5
S
1 2 3
-B-
D 5 PL
0.2 (0.008)
M
B
M
N J C
DIM A B C D G H J K N S
H
K
SOLDERING FOOTPRINT*
0.50 0.0197
0.65 0.025 0.65 0.025 0.40 0.0157
1.9 0.0748
SCALE 20:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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MC74HC1G04
PACKAGE DIMENSIONS
SOT23-5/TSOP-5/SC59-5 DT SUFFIX 5-LEAD PACKAGE CASE 483-02 ISSUE C
D
5 1 2 4 3
S
B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.05 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0_ 10 _ 0.0985 0.1181
L G A J C 0.05 (0.002) H K M
DIM A B C D G H J K L M S
SOLDERING FOOTPRINT*
1.9 0.074
0.95 0.037
2.4 0.094 1.0 0.039 0.7 0.028
SCALE 10:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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6
MC74HC1G04/D


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